1. Field of the Invention
This disclosure relates to a power supply device that switches and outputs either of the output voltage of a LDO (Low Dropout) converter (hereinafter referred to as LDO) serving as a linear regulator or that of a switching regulator, depending on a load current so as to lower current consumption at light load, thereby making it possible to reduce overall power consumption, and to an operations control method thereof.
2. Description of the Related Art
As a known method for outputting an input voltage after converting it into a predetermined voltage in a power supply device, there has widely been employed one that converts power with high conversion efficiency by the use of a switching regulator. In this case, high power conversion efficiency can be obtained at heavy load, but current consumption of the switching regulator itself is increased at light load, resulting in lowering overall conversion efficiency. Therefore, a LDO with low current consumption is used at light load to achieve low current consumption, while a switching regulator is used at heavy load to achieve high efficiency. Furthermore, since an overshoot or an undershoot occurs in an output voltage when an LDO and a switching regulator are switched with each other, there is a necessity to reduce the overshoot and the undershoot in the output voltage occurring at the switching in consideration of the method and the timing of switching between the LDO and the switching regulator.
Accordingly, there has been disclosed a method which sets a simultaneous operating period at the switching from an LDO for constantly controlling an output voltage to a switching regulator, which switches the drive performance of P-ch transistors and N-ch transistors constituting the driver unit of the switching regulator to a low performance mode during the simultaneous operating period, and which switches to a normal mode after stopping the operation of the LDO (see, e.g., Patent Document 1).
Patent Document 1: JP-A-2005-130622
With this method of switching from the LDO to the switching regulator, however, the drive performance of the P-ch transistors constituting the driver unit of the switching regulator is reduced during the period in which operation sections of the LDO and the switching regulator overlap each other in consideration of the timing of switching from the LDO to the switching regulator. Therefore, the loss portion caused by on-resistance of the P-ch transistors is not negligible when a load current flows. As a result, the drop of an output voltage or the like occurs, thereby making it difficult to supply a steady voltage.